In a synchronous system, such as a "mainframe" large scale computer, a clock signal is provided to all parts of the system which is synchronized, or delivered in phase, within a minimum margin of error. The propagation of the clock signal to the various parts of the system will cause the phase of clock due to propagation delays in the communication links among the various parts of the system to skew. When the parts of the system are located on modules which are remote from the clock which generates the clock signal, the propagation delays can be significant, leading to an uncceptable skew in the clock signal at the various modules and system malfunction. Thus, the propagation delays in the communication links which transmit the clock signal must be equalized in order to provide the synchronized clock necessary for running the system.
Typically, the synchronization of the clock by adjusting the delays associated with each of the communication links involves a cumbersome and slow process. Before startup of the machine, with the power on, an operator would measure the clock skew at each of the modules in the system using an oscilloscope or other sensitive measuring equipment. Based on the readings the operator obtains, the operator would then add or subtract a delay element, typically loops of wire or other delay taps, manually to the communication link. The step would involved cutting and soldering the communication link or other equally cumbersome technique which must be accomplished when the system is turned off.
As systems such as mainframe computers grow faster and faster, the synchronization of the clock signal is more and more important. Thus there is a need for an apparatus which provides the delay necessary to synchronize the clock on the communication links which provides ease of adjustment of the clock skew, without powering down the system and without requiring manual soldering or similar cumbersome techniques.